This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown.

  Free from secondary breakdown

  Low power drive requirement

  Ease of paralleling

  Low CISS and fast switching speeds

  Excellent thermal stability

  Integral source-drain diode

  High input impedance and high gain