This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure andwell-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

  Low threshold (-2.4V max.)

  High inputimpedance

  Low input capacitance (125pF max.)

  Fast switching speeds

  Low on-resistance

  Free from secondary breakdown

  Low input and output leakage