NB7L86M

 2.5 V / 3.3 V, 12 Gb/s Differential Clock / Data Smart Gate with CML Output and Internal Termination

制造商:ON

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产品信息

The NB7L86M is a multi-function differential Logic Gate, which
can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1
MUX. This device is part of the GigaComm family of high
performance Silicon Germanium products. The NB7L86M is an
ultra-low jitter multi-logic gate with a maximum data rate of 12 Gb/s
and input clock frequency of 8 GHz suitable for Data Communication
Systems, Telecom Systems, Fiber Channel, and GigE applications.
The device is housed in a low profile 3x3 mm 16-pin QFN package.
Differential inputs incorporate internal 50 Ω termination resistors
and accept LVNECL (Negative ECL), LVPECL (Positive ECL),
LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CML
output provides matching internal 50 Ω termination, and 400 mV
output swing when externally terminated 50 Ω to VCC.
Application notes, models, and support documentation are available
on www.onsemi.com.
  • Maximum Input Clock Frequency up to 8 GHz
  • Maximum Input Data Rate up to 12 Gb/s Typical
  • 30 ps Typical Rise and Fall Times
  • 90 ps Typical Propagation Delay
  • 2 ps Typical Within Device Skew
  • CML Output with Operating Range: V
  • = 2.375 V to 3.465 V with V
  • = 0 V
  • CML Output with Operating Range: V
  • = 2.375 V to 3.465 V with V
  • = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output) Differential Output
  • 50 Ω Internal Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V/3.3 V LVEL, LVEP, EP and SG Devices
  • Pb-Free Packages are Available

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技术资料

应用案例