NB6N239S

 3.3 V Any Differential Clock to LVDS, ÷·1/2/4/8 and ÷·2/4/8/16 Clock Divider

制造商:ON

中文资料及数据手册

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产品信息

The NB6N239S is a high-speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; Div1/2/4/8 and Div 2/4/8/16. Both divider circuits drive LVDS compatible outputs. The NB6N239S is a member of the ECLinPS MAX
family of high performance clock products.
  • Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with Div 1)
  • Input Compatible with LVDS/LVPECL/CML/HSTL
  • 120ps Typical Rise/Fall Times
  • Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz outputs
  • Internal 50Ω Termination Provided
  • Divide-by-1 Edge of QA Aligned to QB Divided Output
  • Operating Range: V
  • = 3.0 V to 3.465V with GND = 0
  • Master Reset for Synchronization of Multiple Chips
  • V
  • Reference Output
  • Synchronous Output Disable/Enable
  • Pb-Free Packages are Available

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技术资料

应用案例