The NB3N121K is a differential 1:21 Clock and Data fanout buffer with High-speed Current Steering Logic (HCSL) outputs optimized for ultra low propagation delay variation. The NB3N121K is designedwith HCSL PCI Express clock distribution and FBDIMM applications in mind.

• Typical Input Clock Frequency 100, 133, 166, 200, 266, 333 and
• 400 MHz
• 340 ps Typical Rise and Fall Times
• 800 ps Typical Propagation Delay
• 100 ps Max Within Device Skew
• 150 ps Max DevicetoDevice Skew
• Delta-tpd 100 ps Maximum Propagation Delay Variation Per Each Differential Pair
• 0.1 ps Typical RMS Additive Phase Jitter
• LVDS Output Levels Optional with Interface Termination
• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
• Typical HCSL Output Level (700 mV PeaktoPeak)