NB3H63143G
3.3 V / 2.5 V One Time Programmable OmniClock Generator with Single-Ended (LVCMOS/LVTTL) and Differential (LVPECL/LVDS/HCSL/CML) Outputs with Individual Output Enable and Individual VDDO
制造商:ON
产品信息
The NB3H63143G, which is a member of the OmniClock family, is a one−time programmable (OTP), low power PLL−based clock generator that supports any output frequency from 8 kHz to 200 MHz. The device accepts fundamental mode parallel resonant crystal or a single ended (LVCMOS/LVTTL) reference clockas input. It generates either three single ended (LVCMOS/LVTTL)outputs, or one single ended output and one differential(LVPECL/LVDS/HCSL/CML) output. The output signals can bemodulated using the spread spectrum feature of the PLL(programmable spread spectrum type, deviation and rate) forapplications demanding low electro−magnetic interference (EMI).Individual output enable pins OE[2:0] are available to enable/disablethe outputs. Individual output voltage pins VDDO[2:0] are availableto independently set the output voltage of each output. Up to fourdifferent configurations can be written into the device memory. Twoselection pins (SEL[1:0]) allow the user to select the configuration touse. Using the PLL bypass mode, it is possible to get a copy of theinput clock on any or all of the outputs. The device can be powereddown using the Power Down pin (PD#). It is possible to program theinternal input crystal load capacitance and the output drive currentprovided by the device. The device also has automatic gain control(crystal power limiting) circuitry which avoids the device overdrivingthe external crystal.
- Member of the OmniClock Family of Programmable Clock Generators
- Operating Power Supply: 3.3 V ±10%, 2.5 V ±10%
- I/O Standards - Inputs: LVCMOS/LVTTL, Fundamental Mode Crystal - Outputs: 1.8 V to 3.3 V LVCMOS/LVTTL - Outputs: LVPECL, LVDS, HCSL and CML
- 3 Programmable Single Ended (LVCMOS/LVTTL) Outputs from 8 kHz to 200 MHz
- 1 Programmable Differential Clock Output up to 200 MHz
- Input Frequency Range - Crystal: 3 MHz to 50 MHz - Reference Clock: 3 MHz to 200 MHz
- Configurable Spread Spectrum Frequency Modulation Parameters (Type, Deviation, Rate)
- Individual Output Enable Pins
- Independent Output Voltage Pins
- Programmable Internal Crystal Load Capacitors
- Programmable Output Drive Current for Single Ended Outputs
- Power Saving Mode through Power Down Pin
- Programmable PLL Bypass Mode
- Programmable Output phase Inversion
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型号:NB3H63143G00MNR2G
描述:-