MCP2050

LIN transceiver with Integrated Vreg plus windowed Watchdog Timer.

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产品信息

The MCP2050 provides a bidirectional, half-duplex communication physical interface to meet the LIN bus specification Revision 2.1 and SAE J2602. The device incorporates a voltage regulator with 5V or 3.3V 70 mA regulated power supply output. The on-chip WWDT allows users to adjust the size of the reset window by using an external resistor. The ratiometric VBAT pin scales down VBAT to the range of VREG so it can be monitored by an A/D converter. The device has been designed to meet the stringent quiescent current requirements of the automotive industry and will survive +43V load dump transients, and double battery jumps.

  Physical Layer Transceiver interface to support LIN Bus Specifications Version 1.3, 2.0, 2.1 and SAE J2602

  Integrated 3.3V or 5.0V Vreg with output current of 70mA and current limit greater than 250mA

  Resistor programmable WWDT

  Vbat ratio output pin

  ESD performance on Vbb & LIN pins > 15KV (IEC 61000-4-2)

  Meets stringent auto requirements including “OEM Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”, Version 1.3

  Typical powerdown current < 4.5uA

  MCP2050 available in 14-pin PDIP and SOIC and 20-pin QFN

  Extended temperature range: -40°C to +125°C

    MCP2050封装图

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