MC74VHC1GT50
Single Non-Inverting Buffer, TTL Level
制造商:ON
产品信息
The MC74VHC1GT50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with low threshold input thresholds and the output has a full CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input,allowing the device to be used as a logic-level translator from 1.65 V logic to 5.5V CMOS
The MC74VHC1GT50 input structure provides protection for input voltages up to 7V , regardless of the supply voltage. The output structures also provide protection when V
= 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with low threshold input thresholds and the output has a full CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input,allowing the device to be used as a logic-level translator from 1.65 V logic to 5.5V CMOS
The MC74VHC1GT50 input structure provides protection for input voltages up to 7V , regardless of the supply voltage. The output structures also provide protection when V
= 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.
- High Speed: t
- = 3.5ns (Typ) at V
- = 5V
- Low Power Dissipation: I
- = 1µA (Max) at T
- = 25°C
- Low threshold Inputs, TTL compatible if Vcc= 5 V: V
- = 0.8V; V
- = 2.0V
- CMOS-Compatible Outputs: V
- > 0.8V
- ; V
- CC @Load
- Power Down Protection Provided on Inputs and Outputs
- Balanced Propagation Delays
- Pin and Function Compatible with Other Standard Logic Families
- Chip Complexity: FETs = 104; Equivalent Gates = 26
- Pb-Free Packages are Available
电路图、引脚图和封装图
在线购买
型号:NLVVHC1GT50DFT1G
描述:-
型号:NLV74VHC1GT50DTT1G
描述:-
型号:NL17VHC1GT50DF1G
描述:-
型号:M74VHC1GT50DTT1G
描述:-
型号:M74VHC1GT50DFT1G
描述:-
型号:M74VHC1GT50DFT2G
描述:-
技术资料
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