MC10EL33

 5.0 V ECL ÷·4 Divider

制造商:ON

中文资料及数据手册

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产品信息

The MC10EL/100EL33 is an integrated ÷4 divider. The differential clock inputs and the V
allow a differential, single-ended or AC coupled interface to the device. If used, the V
output should be bypassed to ground with a 0.015F capacitor. Also note that the V
is designed to be used as an input bias on the EL33 only, the V
output has limited current sink and source capability.
The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EL33's in a system.
The 100 Series contains temperature compensation.
  • 650ps Propagation Delay
  • 4.0GHz Toggle Frequency
  • ESD Protection: > 1 KV HBM, > 100 V MM
  • PECL Mode Operating Range: V
  • = 4.2 V to 5.7 V with V
  • = 0 V
  • NECL Mode Operating Range: V
  • = 0 V with V
  • = -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors on CLK(s) and R.
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
  • For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 95 devices
  • Pb-Free Packages are Available

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技术资料

应用案例