The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0-D8 accepting parallel input data.
The SEL (Select) input pin is used to switch between the two modes of operationHOLD and LOAD. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero.
The 100 Series contains temperature compensation.

• 700MHz Min. Operating Frequency
• 9-Bit for Byte-Parity Applications
• Asynchronous Master Reset
• Dual Clocks
• PECL Mode Operating Range: V
• = 4.2 V to 5.7 V with V
• = 0 V
• 75k
• Input Pulldown Resistors
• NECL Mode Operating Range: V
• = 0 V with V
• = -4.2 V to -5.7 V
• Internal Input Pulldown Resistors
• ESD Protection: > 2 KV HBM, > 200 V MM
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
• For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 484 devices
• Pb-Free Packages are Available