MC100LVELT20

 LVTTL/LVCMOS to Differential LVPECL Translator

制造商:ON

中文资料及数据手册

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产品信息

The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the MC100LVELT20 makes it ideal for those applications where space, performance, and low power are at a
premium.
The 100 Series contains temperature compensation.
  • 390 ps Typical Propagation Delay
  • Maximum Input Clock Frequency > 0.8 GHz Typical
  • Operating Range VCC = 3.0 V to 3.6 Vwith GND = 0 V
  • PNP TTL Input for Minimal Loading
  • Pb-Free Packages are Available

电路图、引脚图和封装图

    MC100LVELT20电路图

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    技术资料

    应用案例