The MC100LVEL40 is a three state phase frequency-detector intended for phase-locked loop applications which require a minimum amount of phase and frequency difference at lock. Advanced design significantly reduces the dead zone of the detector. For proper operation, the input edge rate of the R and V inputs should be less than 5 ns. The device is designed to work with a 3.3 V power supply.
When the reference (R) and the feedback (FB) inputs are unequal in frequency and/or phase the differential up (U) and down (D) outputs will provide pulse streams which when subtracted and integrated provide an error voltage for control of a VCO.
The V
pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
as a switching reference voltage. V
may also rebias AC coupled inputs. When used, decouple V
and V
via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
should be left open.
For application information, see AND8040/D, "Phase Lock Loop Operation."
The 100 Series Contains Temperature Compensation

• 250MHz Typical Bandwidth
• ESD Protection: >2 KV HBM
• PECL Mode Operating Range: V
• = 3.0 V to 5.5 V
• with V
• = 0 V
• NECL Mode Operating Range: V
• = 0 V
• with V
• = -3.0 V to -5.5 V
• Internal Input Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Flammability Rating: UL-94 code V-0 @ 1/8",
• Oxygen Index 28 to 34
• Transistor Count = 356 devices
• Pb-Free Packages are Available