MC100EL35
ECL JK Flip-Flop
制造商:ON
产品信息
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH.
- 525ps Propagation Delay
- 2.2GHz Toggle Frequency
- ESD Protection: > 1 kV HBM, > 100 V MM
- PECL Mode Operating Range: V
- = 4.2 V to 5.7 with V
- = 0 V
- NECL Mode Operating Range: V
- = 0 V with V
- = -4.2 V to -5.7 V
- Internal Input Pulldown Resistors on J, K, CLK, and R
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
- For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94V-0 @ 0.125 in, Oxygen Index: 28 to 34
- Transistor Count = 81 devices
- Pb-Free Packages are Available
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型号:MC100EL35DG
描述:-