The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock (C
) LOW and using the Clock Enable (CEbar) inputs for clocking. Common clocking is achieved by holding the CEbar inputs LOW and using C
to clock all four flip-flops. In this case, the CEbar inputs perform the function of controlling the common clock, to each flip-flop.
Individual asynchronous resets are provided (R). Asynchronous set controls (S) are ganged together in pairs, with the pairing chosen to reflect physical chip symmetry.
Data enters the master when both C
and CEbar are LOW, and transfers to the slave when either C
or CEbar (or both) go HIGH.
The 100 Series contains temperature compensation.

• 1100MHz Min. Toggle Frequency
• Differential Outputs
• Individual and Common Clocks
• Individual Resets (asynchronous)
• Paired Sets (asynchronous)
• PECL Mode Operating Range: V
• = 4.2 V to 5.7 V with V
• = 0 V
• 75k
• Input Pulldown Resistors
• NECL Mode Operating Range: V
• = 0 V with V
• = -4.2 V to -5.7 V
• Internal Input Pulldown Resistors
• Metastability Time Constant is 200 ps.
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• ESD Protection: > 2 KV HBM, > 200 V MM
• Moisture Sensitivity Level 1
• For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 240 devices
• Pb-Free Packages are Available