CAT1026

 CPU Supervisor with 2 k EEPROM Memory

制造商:ON

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产品信息

The CAT1026 is a complete memory and supervisory solution for microcontroller-based systems. A 2 k-bit serial EEPROM memory and a system power supervisor with brown-out protection are integrated together in low power CMOS technology. Memory interface is via a 400 kHz I²C bus.
The CAT1026 provides a precision V
sense circuit with five reset threshold voltage options that support 5.0 V, 3.3 V and 3.0 V systems. The power supply monitor and reset circuit protects memory and systems controllers during power up/down and against brownout conditions. If power supply voltages are out of tolerance reset signals become active preventing the system microcontroller, ASIC, or peripherals from operating.
The CAT1026 features two open drain reset outputs: one (RESET) drives high and the other (
) drives low whenever V
falls below the threshold. Reset outputs become inactive typically 200 ms after the supply voltage exceeds the reset threshold value. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, the
pin can be used as an input for push-button manual reset capability.
The CAT1026 provides an auxiliary voltage sensor input, V
, which is used to monitor a second system supply. The auxiliary high impedance comparator drives the open drain output, V
, whenever the sense voltage is below 1.25 V threshold.
The on-chip 2k-bit EEPROM memory features a 16-byte page. In addition, hardware data protection is provided by a V
sense circuit that prevents writes to memory whenever V
falls below the reset threshold or until V
reaches the reset threshold during power up.
Available packages include an 8-pin DIP, 8-pin SOIC, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP. The TDFN package thickness is 0.8 mm maximum. TDFN footprint is 3x3 mm.
  • Precision V
  • power supply voltage supervisor
  • 5.0 V, 3.3 V and 3.0 V systems
  • Five threshold voltage options
  • Additional voltage monitoring
  • — Externally adjustable down to 1.25 V
  • Active high or low reset
  • — Valid reset guaranteed to V
  • = 1 V
  • 400 kHz I²C bus
  • 3.0 V to 5.5 V operation
  • Low power CMOS technology
  • 16-Byte page write buffer
  • Built-in inadvertent write protection
  • 1,000,000 Program/Erase cycles
  • Manual reset capability
  • 100 year data retention
  • 8-pin DIP, SOIC, TSSOP, MSOP or TDFN
  • (3 x 3 mm foot-print) packages
  • — TDFN max height is 0.8mm
  • Industrial and extended temperature ranges

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技术资料

应用案例